Synopsys Design Compiler
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Synopsys offers Design Compiler 2010 that provides a twofold speedup of the synthesis and physical implementation flow. RTL designers can perform what if floor plan exploration to identify and fix floor plan issues early.
Cost / License
- Paid
- Proprietary
Platforms
- Windows
- Linux
Features
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Tags
- verilog
- logic-synthesis
- asic
- logic-timing
- system-verilog
- Electronics
- eda
- logic-design
- vhdl
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